The present invention is a system which allows the transfer of data blocks of variable size between two data processing devices, the interfaces of which have different widths.
The system, according to the invention, deals in particular with buffering techniques. There are known dynamic series memories functioning according to a first data in first data out (FIFO) principle. Memories of this type are presently built by manufacturers of integrated circuits. An example of such a dynamic series memory is the MM 15,741 made by Monolithic Memories Incorporated.
As advantageous as these products might be, their use is not flexible and require external adaptations of a more or less complicated nature depending on each buffering problem. This results in costly expenditures for material, difficulties in technical production, increased space requirements and a decrease in performance and reliability in these products.
Progress achieved in the area of the miniaturization of electronic circuits, namely in LSI (Large Scale Integration) techniques, enables a larger integration of circuits. This gives way to important cost reduction, simplifies production diagrams of electronic machines and ameliorates equipment performance.